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SN54HC27, SN74HC27 TRIPLE 3-INPUT POSITIVE-NOR GATES
SCLS088D - DECEMBER 1982 - REVISED AUGUST 2003
D D D
Wide Operating Voltage Range of 2 V to 6 V Outputs Can Drive Up To 10 LSTTL Loads Low Power Consumption, 20-A Max ICC
SN54HC27 . . . J OR W PACKAGE SN74HC27 . . . D, DB, N, OR NS PACKAGE (TOP VIEW)
D D D
Typical tpd = 9 ns 4-mA Output Drive at 5 V Low Input Current of 1 A Max
SN54HC27 . . . FK PACKAGE (TOP VIEW)
1A 1B 2A 2B 2C 2Y GND
1 2 3 4 5 6 7
14 13 12 11 10 9 8
VCC 1C 1Y 3C 3B 3A 3Y
1B 1A NC VCC 1C 2A NC 2B NC 2C
4 5 6 7 8 3 2 1 20 19 18 17 16 15 14 9 10 11 12 13
1Y NC 3C NC 3B
NC - No internal connection
description/ordering information
The 'HC27 devices contain three independent 3-input NOR gates. They perform the Boolean function Y = A + B + C or Y = A * B * C in positive logic. ORDERING INFORMATION
TA PDIP - N SOIC - D SOP - NS SSOP - DB CDIP - J -55C 125C -55 C to 125 C CFP - W LCCC - FK PACKAGE Tube of 25 Tube of 50 -40C 85C -40 C to 85 C Reel of 2500 Reel of 250 Reel of 2000 Reel of 2000 Tube of 25 Tube of 150 Tube of 55 ORDERABLE PART NUMBER SN74HC27N SN74HC27D SN74HC27DR SN74HC27DT SN74HC27NSR SN74HC27DBR SNJ54HC27J SNJ54HC27W SNJ54HC27FK HC27 HC27 SNJ54HC27J SNJ54HC27W HC27 TOP-SIDE MARKING SN74HC27N
SNJ54HC27FK Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each gate) INPUTS A H X X L B X H X L C X X H L OUTPUT Y L L L H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
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2Y GND NC 3Y 3A
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SN54HC27, SN74HC27 TRIPLE 3-INPUT POSITIVE-NOR GATES
SCLS088D - DECEMBER 1982 - REVISED AUGUST 2003
logic diagram (positive logic)
A B C Y
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Package thermal impedance, JA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86C/W DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
SN54HC27 MIN VCC VIH Supply voltage High-level input voltage VCC = 2 V VCC = 4.5 V VCC = 6 V VCC = 2 V VIL VI VO t/v t/ v Low-level input voltage Input voltage Output voltage Input transition rise/fall time VCC = 2 V VCC = 4.5 V VCC = 6 V VCC = 4.5 V VCC = 6 V 0 0 2 1.5 3.15 4.2 0.5 1.35 1.8 VCC VCC 1000 500 400 0 0 NOM 5 MAX 6 SN74HC27 MIN 2 1.5 3.15 4.2 0.5 1.35 1.8 VCC VCC 1000 500 400 ns V V V V NOM 5 MAX 6 UNIT V
TA Operating free-air temperature -55 125 -40 85 C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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SN54HC27, SN74HC27 TRIPLE 3-INPUT POSITIVE-NOR GATES
SCLS088D - DECEMBER 1982 - REVISED AUGUST 2003
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS VCC 2V IOH = -20 A A VOH VI = VIH or VIL IOH = -4 mA IOH = -5.2 mA IOL = 20 A A VOL VI = VIH or VIL IOL = 4 mA IOL = 5.2 mA II ICC Ci VI = VCC or 0 VI = VCC or 0, IO = 0 4.5 V 6V 4.5 V 6V 2V 4.5 V 6V 4.5 V 6V 6V 6V 2 V to 6 V 3 MIN 1.9 4.4 5.9 3.98 5.48 TA = 25C TYP MAX 1.998 4.499 5.999 4.3 5.8 0.002 0.001 0.001 0.17 0.15 0.1 0.1 0.1 0.1 0.26 0.26 100 2 10 SN54HC27 MIN 1.9 4.4 5.9 3.7 5.2 0.1 0.1 0.1 0.4 0.4 1000 40 10 MAX SN74HC27 MIN 1.9 4.4 5.9 3.84 5.34 0.1 0.1 0.1 0.33 0.33 1000 20 10 nA A pF V V MAX UNIT
switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1)
PARAMETER FROM (INPUT) TO (OUTPUT) VCC 2V tpd A, B, or C Y 4.5 V 6V 2V tt Y 4.5 V 6V MIN TA = 25C TYP MAX 35 10 9 27 7 6 90 18 15 75 15 13 SN54HC27 MIN MAX 135 27 23 110 22 19 SN74HC27 MIN MAX 115 23 20 95 19 16 ns ns UNIT
operating characteristics, TA = 25C
PARAMETER Cpd Power dissipation capacitance per gate TEST CONDITIONS No load TYP 25 UNIT pF
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SN54HC27, SN74HC27 TRIPLE 3-INPUT POSITIVE-NOR GATES
SCLS088D - DECEMBER 1982 - REVISED AUGUST 2003
PARAMETER MEASUREMENT INFORMATION
From Output Under Test Test Point CL = 50 pF (see Note A) In-Phase Output Input VCC 50% tPLH 50% 10% tPHL Out-of-Phase Output 90% 50% 10% tf 90% tr Input 50% 10% 90% 90% VCC 50% 10% 0 V tf tPLH 50% 10% 90% tr 50% 0V tPHL 90% VOH 50% 10% VOL tf VOH VOL
LOAD CIRCUIT
tr VOLTAGE WAVEFORM INPUT RISE AND FALL TIMES
VOLTAGE WAVEFORMS PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
NOTES: A. CL includes probe and test-fixture capacitance. B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO = 50 , tr = 6 ns, tf = 6 ns. C. The outputs are measured one at a time with one input transition per measurement. D. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
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MECHANICAL DATA
MCFP002A - JANUARY 1995 - REVISED FEBRUARY 2002
W (R-GDFP-F14)
CERAMIC DUAL FLATPACK
Base and Seating Plane
0.045 (1,14) 0.026 (0,66)
0.260 (6,60) 0.235 (5,97)
0.080 (2,03) 0.045 (1,14)
0.008 (0,20) 0.004 (0,10)
0.280 (7,11) MAX 1 14 0.019 (0,48) 0.015 (0,38)
0.050 (1,27)
0.390 (9,91) 0.335 (8,51) 0.005 (0,13) MIN 4 Places
7 0.360 (9,14) 0.250 (6,35)
8 0.360 (9,14) 0.250 (6,35)
4040180-2 / C 02/02 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a ceramic lid using glass frit. Index point is provided on cap for terminal identification only. Falls within MIL STD 1835 GDFP1-F14 and JEDEC MO-092AB
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1
MECHANICAL DATA
MLCC006B - OCTOBER 1996
FK (S-CQCC-N**)
28 TERMINAL SHOWN
LEADLESS CERAMIC CHIP CARRIER
18
17
16
15
14
13
12
NO. OF TERMINALS ** 11 10 28 9 8 7 6 68 5 84 44 52 20
A MIN 0.342 (8,69) 0.442 (11,23) 0.640 (16,26) 0.739 (18,78) 0.938 (23,83) 1.141 (28,99) MAX 0.358 (9,09) 0.458 (11,63) 0.660 (16,76) 0.761 (19,32) 0.962 (24,43) 1.165 (29,59) MIN 0.307 (7,80) 0.406 (10,31) 0.495 (12,58) 0.495 (12,58) 0.850 (21,6) 1.047 (26,6)
B MAX 0.358 (9,09) 0.458 (11,63) 0.560 (14,22) 0.560 (14,22) 0.858 (21,8) 1.063 (27,0)
19 20 21 B SQ 22 A SQ 23 24 25
26
27
28
1
2
3
4 0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25)
0.020 (0,51) 0.010 (0,25)
0.055 (1,40) 0.045 (1,14)
0.045 (1,14) 0.035 (0,89)
0.028 (0,71) 0.022 (0,54) 0.050 (1,27)
0.045 (1,14) 0.035 (0,89)
4040140 / D 10/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a metal lid. The terminals are gold plated. Falls within JEDEC MS-004
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1
MECHANICAL
MPDI002C - JANUARY 1995 - REVISED DECEMBER 20002
N (R-PDIP-T**)
16 PINS SHOWN
PLASTIC DUAL-IN-LINE PACKAGE
PINS ** DIM A 16 9 A MAX
14 0.775 (19,69) 0.745 (18,92)
16 0.775 (19,69) 0.745 (18,92)
18 0.920 (23,37) 0.850 (21,59)
20 1.060 (26,92) 0.940 (23,88)
A MIN
0.260 (6,60) 0.240 (6,10)
C
MS-100 VARIATION
AA
BB
AC
AD
1 0.070 (1,78) 0.045 (1,14) D
8
0.045 (1,14) 0.030 (0,76) D
0.020 (0,51) MIN
0.325 (8,26) 0.300 (7,62) 0.015 (0,38) 0.200 (5,08) MAX Seating Plane 0.125 (3,18) MIN 0.010 (0,25) NOM Gauge Plane
0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0.010 (0,25) M
0.430 (10,92) MAX
14/18 PIN ONLY 20 pin vendor option
D 4040049/E 12/2002
NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001, except 18 and 20 pin minimum body lrngth (Dim A). D. The 20 pin end lead shoulder width is a vendor option, either half or full width.
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MECHANICAL DATA
MSOI002B - JANUARY 1995 - REVISED SEPTEMBER 2001
D (R-PDSO-G**)
8 PINS SHOWN 0.050 (1,27) 8 5 0.020 (0,51) 0.014 (0,35) 0.010 (0,25)
PLASTIC SMALL-OUTLINE PACKAGE
0.244 (6,20) 0.228 (5,80) 0.157 (4,00) 0.150 (3,81)
0.008 (0,20) NOM
Gage Plane 1 A 4 0- 8 0.044 (1,12) 0.016 (0,40)
0.010 (0,25)
Seating Plane 0.069 (1,75) MAX 0.010 (0,25) 0.004 (0,10) 0.004 (0,10)
PINS ** DIM A MAX A MIN
8 0.197 (5,00) 0.189 (4,80)
14 0.344 (8,75) 0.337 (8,55)
16 0.394 (10,00) 0.386 (9,80)
4040047/E 09/01 NOTES: A. B. C. D. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15). Falls within JEDEC MS-012
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MECHANICAL DATA
MSSO002E - JANUARY 1995 - REVISED DECEMBER 2001
DB (R-PDSO-G**)
28 PINS SHOWN 0,65 28 0,38 0,22 15 0,15 M
PLASTIC SMALL-OUTLINE
0,25 0,09 5,60 5,00 8,20 7,40
Gage Plane 1 A 14 0- 8 0,25 0,95 0,55
Seating Plane 2,00 MAX 0,05 MIN 0,10
PINS ** DIM A MAX
14
16
20
24
28
30
38
6,50
6,50
7,50
8,50
10,50
10,50
12,90
A MIN
5,90
5,90
6,90
7,90
9,90
9,90
12,30 4040065 /E 12/01
NOTES: A. B. C. D.
All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150
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